Design Verification
loading...
Thank you for your query. We will reply to you at the earliest.
Functional Verification Ethernet Verification IP

Display Port v 1.4

Products >> Verification IP >> Display Port v 1.4

Display Port v 1.4 Verification IP

Truechip's Display Port v 1.4 Verification IP provides an effective & efficient way to verify the components interfacing with Display Port interface of an ASIC/FPGA or SoC.

Truechip's Display port VIP is fully compliant with Standard Display Port Version 1.4a specifications from VESA This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design time and the simulation time.

Key Benefits

  • Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
  • Unique development methodology to ensure highest levels of quality.
  • Availability of various Regression Test Suites.
  • 24X5 customer support.
  • Unique and customizable licensing models.
  • Exhaustive set of assertions and cover points with connectivity example for all the components.
  • Consistency of interface, installation, operation and documentation across all our VIPs.
  • Provide complete solution and easy integration in IP and SoC environment.

Features

  • Fully compliant to VESA DisplayPort standard 1.4a Specification.
  • Supports DisplayPort Source device and Sink device functionality.
  • Supports multi lanes up to 4 lanes.
  • Supports serial and parallel bit ordering.
  • Supports Control Symbols for framing.
  • Supports Main Link, AUX link and Hot Plug functionality.
  • Supports Nibble Interleaving (ECC).
  • Supports Fast and Full link Training.
  • Supports I2C over AUX Channel.
  • Supports Interlaced and Non-Interlaced video stream.
  • Supports 3D stereo and Multi stream Transport(MST).
  • Supports to access EDID and DPCD registers.
  • Supports packing of all the video and audio formats.
  • Supports RGB, YCBCR444, YCBCR422, YCBCR420 and RAW color format.
  • Supports High Bandwidth Digital Content Protection System Version 1.3 and 2.2.
  • Supports Scrambler which can be enabled or disabled dynamically.
  • Receiver and Monitor are able to handle and report following types of error.
  • Invalid control character, invalid data character, Sync errors, Scrambler errors, Invalid 10bit code.
  • Supports dynamically configurable modes.
  • Strong Protocol Monitor with real time exhaustive programmable checks.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using protocol check functions, static and dynamic assertions.
  • Built in Coverage analysis.
  • Graphical analyzer to show transactions for easy debugging.

Deliverables

  • Display Port Source BFM/Agent
  • Display Port Sink BFM/Agent
  • Display Port Monitor and Scoreboard
  • Test-Bench Configurations
  • Test Suite (Available in Source code):
    • Basic Protocol Tests
    • Directed & Random Tests
    • Assertion and Cover Point Tests
  • Integration Guide, User Manual and Release Notes
  • GUI analyser to view simulation packet Flow
Download the Product Brochure from here