Design Verification
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Functional Verification Ethernet Verification IP

DisplayPort 2.0

Products >> Verification IP >> DisplayPort 2.0

DisplayPort 2.0 Verification IP

Truechip's DisplayPort version 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the DisplayPort interface of an ASIC/FPGA or SoC. Truechip's Display port VIP is fully compliant with Standard DisplayPort Version 2.0 specifications from VESA This VIP is a light weight VIP with easy plug-and -play interface so that there is no hit on the design time and the simulation time. 

Key Benefits

  • Available in native System Verilog (UVM/OVM/ VMM) and Verilog
  • Unique development methodology to ensure highest levels of quality
  • Availability of Compliance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and coverage points with connectivity example for all the components
  • Consistency of interface, installation, operation and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment

Features

  • Fully compliant to VESA DisplayPort standard 2.0 Specification
  • Supports High Bandwidth Digital Content Protection System Version 1.4, 2.2 and 2.3.
  • Supports Multi-Stream transport (MST)
  • Supports Link Training(LT) tunable PHY Repeaters (LTTPR)
  • Supports Reed-Solomon Forward Error Correction RS(254,250)
  • Supports all Link rates as per DP 2.0 (UHBR10, UHBR13.5, UHBR20)
  • Supports 128b/132b channel encoding
  • Supports Control Data Indicator Field insertion
  • Supports Precoding and its decoding
  • Supports PIPE v 5.2.1 (For Link and PHY interfacing)
  • Supports DisplayPort Source device and Sink device functionality
  • Supports Main Link, AUX link and Hot Plug functionality (lRQ etc.,)
  • Supports multi lane configuration (upto 4 lanes)
  • Supports clock data recovery(CDR)
  • Supports Link Training
  • Supports Nibble Interleaving (ECC)
  • Supports DSC v1.2a(Compressed Display Stream Transport Services)
  • Supports DisplayPort Configuration Data (DPCD) version 1.4
  • Support of legacy EDID is provided
  • Supports I2C over AUX Channel and Native AUX
  • Supports Main Stream Attributes and SDP
  • Supports Interlaced, Non-Interlaced video stream and 3D stereo
  • Supports all types of Audio and Video as per CTA(CEA)
  • Supports RGB, YCbCr444, YCbCr422, YCbCr420 and RAW color format
  • Supports all color depth ( 6,8,10,12,16 bpc)
  • Supports transmitter and receiver skew
  • Supports serial and parallel bit ordering
  • Support Control Symbols for framing
  • Supports dynamically configurable modes.
  • Strong Protocol Monitor with real time exhaustive programmable checks.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using protocol check functions, static and dynamic assertions
  • Built in Coverage analysis.
  • Graphical analyzer to show transactions for easy debugging

Deliverables

  • DisplayPort 2.0 BFM's for:
    • Source - Link Layer
    • Source - MAC Layer
    • Source - PHY Layer
    • Sink - Link Layer
    • Sink - MAC Layer
    • Sink - PHY Layer
    • Branching Devices
  • DisplayPort layered monitor & scoreboard
  • Test Environment & Test Suite :
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
    • Compliance Test Suite
    • User Test Suite
  • Integration guide, user manual, and release notes
  • GUI analyzer to view simulation packet flow
Download the Product Brochure from here