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CPHY v1.2

Products >> Verification IP >> CPHY v1.2

MIPI C-PHY Verification IP

Truechip's C-PHY Verification IP provides an effective & efficient way to verify the components interfacing with C-PHY interface of an IP or SoC.

Truechip's C-PHY VIP is fully compliant with MIPI C-PHY Specification version 1.2 The VIP is light weight with easy plug-and- play interface so that there is no hit on the design cycle time.

Key Benefits

  • Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
  • Unique development methodology to ensure highest levels of quality
  • Availability of Conformance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and cover points with connectivity example for all the components
  • Consistency of interface, installation, operation and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment.


  • Compliant to MIPI C-PHY Specification version 1.2 with PPI interface.
  • Supports all configuration of a data lane module as specified in Figure 6 of C-PHY specification version 1.2 for Data Lane Module (MFAA & SFAA, MFAE & SFAE, MFEA & SFEA, MFAN & SFAN, MFEE & SFEE, MFEN & SFEN).
  • Supports ULPS, Triggers and LPDT in low power escape mode.
  • Bi-directional Data lane turnaround is supported for escape mode
  • Configurable number of Data Lanes.
  • Supports High-Speed mode and Low Power Escape and Control modes.
  • Supports continuous and non-continuous clock behaviour.
  • Supports 16-bit to 7-symbol Mapper and 7-symbol to 16-bit Demapper.
  • Supports symbol encoding and decoding.
  • Supports dynamically configurable modes.
  • Strong Protocol Monitor with real time exhaustive programmable checks.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using assertions.
  • Built in Coverage analysis.
  • Provides a comprehensive user API (callbacks) in Master and slave.
  • Graphical analyser to show transactions for easy debugging.


  • MIPI C-PHY Master/Slave BFM/Agent
  • MIPI C-PHY Monitor
  • MIPI C-PHY Scoreboard
  • Testbench Configurations
  • Test Suite (Available in Source code)
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
  • Integration Guide, User Manual and Release Notes
Download the Product Brochure from here