Design Verification
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Functional Verification Ethernet Verification IP

Webinars

Webinars

Resources >> Webinars

Webinar Topic

Understanding JESD204C - A high-speed serial link between data converters and logic devices

Who Should Attend :

  • Professionals working on development of Soc/IP/VIP level of JESD204C.
  • Professionals working on verification of JESD204C at Soc/IP/VIP level or any intermediate level
  • People keen to know how JESD204C is shaping new era of superspeed data transfers
  • Freshers in the field of VLSI industry.

Key Take Aways from Webinar:

  • Gaining knowledge about JESD204C
  • Understanding data Link Layers - 8B/10B, 64B/66B, 64B/80B
  • Lane / Frame Synchronization and Alignment
  • Becoming aware of Deterministic Latency and Clocking
  • Knowing Transmitter & Receiver Device Operations

Past Webinars

  • Understanding JESD204C - A high-speed serial link between data converters and logic devices
  • Gen-Z, An Architectural Understanding
  • Revealing USB 3.2 - From Bootup
    to Data Transfer
  • DDR-Exploring DIMMS
  • Ethernet-Unveiling the Basics
  • PCIe Gen4 - Decoding Verification
Registration Link For US/Canada Audience

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Registration Link For UK/Europe/Israel/Asia Pacific Audience

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