LVDS Verification IP

Truechip's LVDS Verification IP provides an effective & efficient way to verify the LPC components of an IP or SoC. Truechip's LVDS VIP is fully compliant with LVDS Specification, The VIP is lightweight with easy plug-and-play components so that there is no hit on the design cycle time.

Key Benefits

• Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
• Unique development methodology to ensure the highest levels of quality.
• Availability of various Regression Test Suites.
• 24X5 customer support.
• Unique and customizable licensing models.
• Exhaustive set of assertions and cover points with connectivity example for all the components.
• Consistency of interface, installation, operation and documentation across all our VIPs.
• Provide complete solution and easy integration in IP and SoC environment.

Features

• Compliant with LVDS Atmel-42415-WIRELESS-AT86RF215_ Datasheet specification.
• Supports dual independent RFIC and respective BBIC.
• Supports serial I/Q LVDS interface.
• Supports SPI control interface.
• Supports both Baseband and I/Q radio mode.
• Supports all kind of interrupts.
• Supports TX/RX frame buffering.
• Supports MR-FSK, MR-OFDM, O-QPSK.
• Supports Callbacks for error injections.
• Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing, and protocol violations.
• In-built coverage analysis Test and Sequences LVDS VIP External Baseband Controller AT86RF215 Transceiver LVDS Monitor Func onal/check Coverage.
• LVDS VIP comes with a complete test suite to verify every feature.
• LVDS VIP comes with a Transaction analyser and Performance Monitors.

Deliverables

• LVDS Transceivers/BFM/Agent
• LVDS Monitor ISO 9001:2015 Certified
• LVDS Scoreboard
• Testbench Configuration
• Test Suit (Available in Source code)
  • Basic and Directed Protocol Tests
  • Random Tests
  • Error Scenario Tests
  • Assertion & Cover Point Tests
• Integration Guide, User Manual and Release Notes