DvCon India 2015 Sept 10-11 at Hotel Leela Palace, Bangalore, India

Bangalore, (Sept 10- 11) This is the second time for DVCon India 2015 & it was a great success. Few highlights from DVCon India 2015 -

4 keynote speeches
12 Tutorials
+600 Attendees
The Award for Best Paper Presentation in the ESL track
The Award for Best Paper Presentation in the DV track
The Best Poster Award
The two-day event was inaugurated with a lamp-lighting ceremony and welcome remarks by Jalan.

Harry Foster, Chief Scientist, Design Verification Technology Division at Mentor Graphics, delivered a thoughtful keynote speech outlining the rising complexity of designs. In the second keynote of the opening day Vinay Shenoy, Managing Director of Infineon Technologies India, addressed a packed room of more than 550 attendees. In addition to reiterating the rising complexity throughout the entire design ecosystem, Vinay highlighted the Make in India initiative. Ajeetha Kumari, Vice Chair of DVCon India 2015, opened the second day’s proceedings.

The entire afternoon of the first day was dedicated to tutorials, with six covering SystemVerilog and UVM topics and four covering ESL. This year DVCon India is celebrating the 10-year anniversary of SystemVerilog, as well as the release of Universal Verification Methodology (UVM) 1.2 to the IEEE P1800.2 working group for development and ongoing maintenance as an IEEE standard. The Gala Dinner was well attended and provided an additional opportunity for networking in a more relaxed atmosphere. Both SystemVerilog and UVM are creations of Accellera’s working groups.