| AMBA® AXI 4.0 Verification IP |
| Truechip's Products >> Verification IPs >> AMBA>®AXI 4.0 Verification IP |
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Truechip's AMBA® AXI4Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI4 bus inan ASIC/FPGA or SOC.
Availability of Test Suites enables the designers to focus on features unique to their design. |
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| VIP Available |
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- Master Agent.
- Slave Agent .
- Bus Monitor and Scoreboarding .
- AXI4™ Interconnect Model .
- AXI4™-AXI3™ (and vice versa) Gasket models.
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| Feature Set |
- Compliant with the AMBA® AXI4™ specifications from ARM. AXI4 Master, Slave and Monitor Agents with
Extensive Protocol Checks Which provide details of Transactions.
- Parameterized Data bus, Address bus and ID Widths make the VIP easily usable for client buses with different widths.
- All protocol burst types, burst lengths and response types supported.
- Configurable wait states on different channels.
- Internal Architecture Based on TLM 2.0 .
- Rich set of configuration parameters to control AXI functionality.
- Cache Model integrated.
- AXI4 Verification IP comes with Extensive Coverage Across the Channels .
- AXI Verification IP comes with complete test suite Contains Directed and Random tests which covers every
feature of ARM AMBA® AXI4™ specification.
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| Deliveribles |
- UVM and OVM compliant AXI4 VIP available for shipment.
- Complete source code for AXI4™ Master Agent, Slave Agent, Bus Monitor and Testbench.
- Regression suite, regression scripts and testcases for AXI3™ compliance.
- Exhaustive set of Assertions and coverage points with connectivity example for individual components.
- Complete documentation of the Architecture of the Master, Slave and Monitor and about the Testbench configuration.
- Documentation will include User's Guide and Release Notes .
- UVM and OVM compliant AXI4 VIP available for shipment.
- Complete source code for AXI4™ Master Agent, Slave Agent, Bus Monitor and Testbench.
- Regression suite, regression scripts and testcases for AXI3™ compliance.
- Exhaustive set of Assertions and coverage points with connectivity example for individual components.
- Complete documentation of the Architecture of the Master, Slave and Monitor and about the Testbench configuration.
- Documentation will include User's Guide and Release Notes .
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For free Demo/ Free Trial version, Send a request to ipdesign@truechip.net |
PS: AMBA® and AXI4 are Trademarks of ARM Inc. |
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