Thank you for your query. We will reply to you at the earliest.

AHB 3/2

Products >> Verification IP >> AHB 3/2

AMBA AHB 2 Verification IP

Truechip's AMBA 2.0 AHB Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® 2.0 AHB bus of an IP or SoC.
Truechip's AMBA 2.0 AHB VIP is fully compliant with standard AMBA® 2.0 AHB specification from ARM. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.

Key Benefits

  • Available in native SystemVerilog (UVM/OVM/VMM) and Verilog 
  • Unique development methodology to ensure highest levels of quality
  • Availability of various Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and cover points with connectivity example for all the components
  • Consistency of interface, installation, operation and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment


  • Compliant to AMBA® 2.0 AHB specifications from ARM.
  • Support for all type of AMBA AHB devices:
    •  AHB2 Master 
    •  AHB2 Slave 
  • Parameterized data and address widths.
  • Support for all protocol Transfer Types, Burst Transfers.
  • Support all the Transfer sizes.
  • Supports split and retry transfers.
  • Controllable busy and wait states insertions.
  • Supports constrained randomization of protocol attributes.
  • Control of response per address or per transaction.
  • On-the-fly protocol checking using protocol check functions.
  • Supports Early burst termination and locked transfers.
  • Supports Callback in Master, Slave, Monitor and Scoreboard.
  • Complete static and dynamic assertion protocol checks.
  • Supports wide variety of error injection scenarios.
  • Complete Test Suites to test every feature of AHB specification.
  • VIP supports Cacheable, Bufferable, data fetch or user privileged accesses.
  • Support transaction logging with detailed description of each transfer.
  • Support UVM _ RAL Model.
  • Configurable Memory.
  • Support different ARBITRATION LOGIC:
    •  Round Robin
    •  Fixed Priority
    •  Least Recently used
  • Provides detailed performance monitoring for all the transfers.
  • Support GUI analyzer for easy debugging


  • AMBA 2.0 AHB Master/Slave Agent
  • AMBA 2.0 AHB Bus Monitor and Scoreboard
  • AMBA 2.0 AHB Bus Interconnection 
  • Test Environment & Test Suite :
    •  Basic and Directed Protocol Tests
    •  Random Tests
    •  Error Scenario Tests
    •  Assertions & Cover Point Tests
  • Integration Guide, User Manual and Release Notes
Download the Product Brochure from here