MIPI Unipro v3.0 Verification IP

Truechip's MIPI UniPro Verification IP provides an effective & efficient way to verify the components interfacing with MIPI UniPro interface of an IP or SoC. Truechip's MIPI UniPro VIP is fully compliant with MIPI Alliance specification for UniPro Version 3.0. The VIP is light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.

Key Benefits

• Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
• Unique development methodology to ensure highest levels of quality.
• Availability of Conformance and Regression Test Suites.
• 24X5 customer support.
• Unique and customizable licensing models.
• Exhaustive set of assertions and cover points with connectivity example for all the components.
• Consistency of interface, installation, operation and documentation across all our VIPs.
• Provide complete solution and easy integration in IP and SoC environment.

Features

• MIPI UniPro VIP is fully compliant with MIPI UniPro Specification 3.0 and MIPI M-PHY Specification 6.0
• Fully supports Transport Layer, Network Layer, Data Link Layer, PHY Adapter Layer and Device Management Entity
• Supports maximum of four Lanes in each direction
• Supports different HS-GEAR in both directions.
• Supports a common shared reference clock in both directions.
• Supports RMMI Interface for the M-PHY at all Interface widths
• Supports Reset, Hibernate and Boot Procedures
• Supports UniPro Cold, UniPro Warm and EndPoint Reset
• Supports Link Startup, Configuration and (Re-)Initialization sequences
• Supports provision of UniPro power management operating modes
• Supports Lane distribution and merging in multi-Lane ports
• Supports PACP communication
• Supports Skip symbol insertion for HS-G1 to HS-G5
• Supports Scrambling for EMI Mitigation
• Support for error processing during Link startup
• Support change in power mode process with ADAPT process
• Support for up to two Traffic Classes: TC0 and Tc1
• Supports Data Link Layer Initialization and Flow Control along with Data and Control Frames T_SAP
• Supports optional Frame pre-emption feature and capability to receive pre-empted Frames
• Supports packet format and segment format recognition
• Supports Addressing, Connections, Message Segmentation and Reassembly
• Supports CPort Address Translation and CPort Arbitration
• Supports Transport Layer End-to-End Flow Control and Test Features
• Performs protocol checks at all layers of the UniPro Stack
• Supports dynamically configurable mode
• Supports 1b1b Line Encoding with transmission BER <10-⁶ per Lane
• Supports TFS_FLR Control Symbols for operation with 1b1b Line Encoding.
• Supports Further Lane Data Path (LDP) processing
• Supports Link Equalization Training for HS Gears HS-G4 to HS-G6
• Supports Transport Framing Structure (TFS)
• Supports TFS Packing and Unpacking, 64-Bit CRC, Forward Error Correction, TFS Error Handling and TFS Frame mapping to PA_PDU
• Built in Coverage analysis
• Provides a comprehensive user API (callbacks) in all Devices
• Graphical analyser to show transactions for easy debugging

Deliverables

• MIPI UniPro Stacks
  • PHY Adapter Layer Agent
  • Data Link Layer Agent
  • Network Layer Agent
  • Transport Layer Agent
  • Device Management Entity Agent
• MIPI UniPro layered Monitor and Scoreboard
• Test Environment & Test Suite :
  • Basic Protocol Tests
  • Directed & Random Tests
  • Assertions & Cover Point Tests
  • Error Injection Tests
• Protocol Conformance Tests
• Integration Guide, User Manual and Release Notes