DisplayPort 1.4 Verification IP

Truechip's DisplayPort version 1.4a Verification IP provides an effective & efficient way to verify the components interfacing with the DisplayPort interface of an ASIC/FPGA or SoC. Truechip's Display port VIP is fully compliant with Standard DisplayPort Version 1.4a specifications from VESA This VIP is a light weight VIP with easy plug-and -play interface so that there is no hit on the design time and the simulation time.

Key Benefits

• Available in native System Verilog (UVM/OVM/ VMM) and Verilog
• Unique development methodology to ensure highest levels of quality
• Availability of Compliance & Regression Test Suites
• 24X5 customer support
• Unique and customizable licensing models
• Exhaustive set of assertions and coverage points with connectivity example for all the components
• Consistency of interface, installation, operation and documentation across all our VIPs
• Provide complete solution and easy integration in IP and SoC environment

Features

• Fully compliant to VESA DisplayPort standard 1.4a Specification
• Supports HDCP version 1.4, 2.2 and 2.3.
• Supports Multi-Stream transport (MST)
• Supports Link Training(LT) tunable PHY Repeaters (LTTPR)
• Supports Reed-Solomon Forward Error Correction RS(254,250)
• Supports DSC v1.2a(Compressed Display Stream Transport Services)
• Supports PIPE v5.1 (For Link and PHY interfacing)
• Supports multi lane & link rate configuration capability
• Supports DisplayPort Configuration Data (DPCD) version 1.4
• Supports I2C over AUX Channel and Native AUX
• Supports all the functionality of DisplayPort Source device and Sink device
• Supports Main Link, AUX link and Hot Plug functionality (IRQ etc.,)
• Supports clock data recovery(CDR)
• Supports Main Stream Attributes and SDP
• Support of legacy EDID is provided
• Supports Link Training
• Supports Nibble Interleaving (ECC)
• Supports Interlaced, Non-Interlaced video stream and 3D stereo
• Supports all types of Audio and Video as per CTA(CEA).
• Supports RGB, YCbCr444, YCbCr422, YCbCr420 and RAW color format
• Supports all color depth ( 6,8,10,12,16 bpc)
• Supports serial and parallel bit ordering.
• Supports Control Symbols for framing.
• Supports 8b/10b encoding, skew/deskew operation
• Support Scrambler which can be enabled or disabled dynamically
• Callback support in BFM to provide user control.
• Supports Dynamic as well as Static Error Injection scenarios.
• Strong Protocol Monitor with real time exhaustive programmable checks.
• Supports dynamically configurable modes.
• On the fly protocol checking using protocol check functions, static and dynamic assertions
• Built in Coverage analysis.
• Graphical analyzer to show transactions for easy debugging

Deliverables

• DisplayPort 1.4a BFM's for
  • Source - Link Layer
  • Source - MAC Layer
  • Source - PHY Layer
  • Sink - Link Layer
  • Sink - MAC Layer
  • Sink - PHY Layer
  • Branching Devices
• DisplayPort layered monitor & scoreboard
• Test Environment & Test Suite:
  • Basic and Directed Protocol Tests
  • Random Tests
  • Error Scenario Tests
  • Assertions & Cover Point Tests
  • Compliance Test Suite
  • User Test Suite
• Integration guide, user manual, and release notes
• GUI analyzer to view simulation packet flow