MIPI CSI2 With C-PHY Verification IP
Truechip's MIPI CSI-2 with C-PHY Verification IP provides an effective and efficient way to verify the components interfacing with MIPI CSI-2 with C-PHY interface of an IP or SoC.
Truechip's MIPI CSI-2 with C-PHY VIP is fully compliant to MIPI CSI-2 Specification version 2.1 along with MIPI C-PHY Specification version 1.2. The VIP is light weight with easy plug-and- play interface so that there is no hit on the design cycle time.
Key Benefits
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
- Availability of Conformance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and cover points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment.
Features
- Compliant to MIPI CSI-2 Specification version 2.1 along with MIPI C-PHY Specification version 1.2 with PPI interface.
- Support upto 32 virtual channels with C-PHY
- Support for LRTE and data scrambling.
- C-PHY supports MFEN and SFEN for CSI-2 TX and RX respectively for Data Lane Module.
- Support for configurable number of lane, low Power Escape.
- Configurable ULPS mode and other CSI-2 configuration using CCI Commands.
- Supports Data Lane distribution and merging in case of multi-Lane configuration.
- Supports High-Speed , Low Power Escape, & Control modes.
- Supports 16-bit to 7-symbol Mapper and 7-symbol to 16-bit Demapper.
- Supports symbol encoding and decoding
- Supports dynamically configurable modes.
- Supports all Short and Long packet formats.
- Supports ECC and CRC generation as well as correction/detection.
- Supports all primary and secondary CSI-2 data formats.
- Supports Frame/ Line Synchronization.
- Supports both Data Type Interleaving and Virtual Channel Interleaving frames.
- Strong Protocol Monitor with real time exhaustive programmable checks available for each LLP, LM and PHY layer.
- Supports Dynamic as well as Static Error Injection scenarios at both Protocol and PHY layer.
- On the fly protocol checking using assertions.
- Built in Coverage analysis.
- Provides a comprehensive user API (callbacks) in Transmitter and Receive.
- Graphical analyzer for all Layers to show transactions for easy debugging.
Deliverables
- MIPI CSI-2 TX/RX BFM/Agent
- MIPI CSI-2 Monitor and Scoreboard
- CCI Master/Slave BFM/Agent
- Test Environment & Test Suite :
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Assertions & Cover Point Tests
- Conformance Tests
- Integration Guide, User Manual and Release Notes