ONFI 5.2 Verification IP

Truechip's ONFI Verification IP provides an effective & efficient Deliverables way to verify the ONFI components of an IP or SoC. Truechip's VIP is fully compliant with ONFI5.2 specifications. The VIP is light weight with easy plug-and-play components so that there is no hit on the design cycle time.

Key Benefits

• Available in native System Verilog (UVM/OVM/VMM) and Verilog
• Unique development methodology to ensure the highest levels of quality
• Availability of Compliance & Regression Test Suites
• 24X5 customer support
• Unique and customizable licensing models
• Exhaustive set of assertions and cover points with connectivity examples for all the components
• Consistency of interface, installation, operation, and documentation across all our VIPs
• Provide complete solutions and easy integration in IP and SoC environment

Features

• Compliant to ONFI-2.3 ,ONFI-3.0 ,ONFI-4.0 ,ONFI-4.1, ONFI-4.2 and ONFI-5.0,5.1,5.2 specifications.
• Supports all mandatory and optional commands.
• Supports generation of Vendor Specific Commands.
• Supports upto 16-bit bus width operations.
• Supports implicit and explicit trainings(DCC, Read DQ, Write DQ Tx, Write DQ Rx).
• Supports SDR, DDR, NV-DDR2, NV-DDR3 data interface with all timing modes.
• Supports ECC mechanism using BCH encoding.
• Backdoor access from the device to check data integrity.
• On-the-fly protocol and data checking.
• Supports run-time selection of part-number for configuration of parameter page in the NAND Flash Device.
• Supports Callbacks for accessibility of the data observed by components.
• ONFI Verification IP comes with complete testsuite to test every feature of ONFI5.2 specification.
• Support for selecting vendor part-number/ user-defined part number during runtime.
• Supports Multi package integration and CE_n reduction.
• Supports configurable timing parameters.
• Provides Error masking mechanism.
• Integrates easily in any verification environment.
• Supports full timing models or bus functional models.
• Supports wide variety of Error Injection scenarios.
• Built in functional coverage analysis.
• Debug log support for each component.
• Provides GUI model for easy debugging

Deliverables

• ONFI controller BFM/Agent
• ONFI device BFM/ Agent
• ONFI Monitor & Scoreboard
• Test-Bench Configurations
• Test Suite (Available in Source code)
  • Basic and Directed Protocol Tests
  • Random Tests and Error Scenario Tests
  • Assertions & Cover Point Tests
•  Integration Guide, User Manual and Release Notes