Preemption Verification IP
Truechip's Preemption Verification IP provides an effective & efficient way to verify the components interfacing with Preemption interface of an IP or SoC. Truechip's Preemption VIP is fully compliant with IEEE 802.3-2018 CL-99 specification. This VIP is lightweight with an easy plug -and- play interface so that there is no hit on the design cycle time.
Key Benefits
- Available in native System Verilog (UVM/OVM/ VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity examples for all the components
- Consistency of interface, installation, operation, and documentation across all our VIPs
- Provide complete solutions and easy integration in IP and SoC environment
Features
- Provides Ethernet fully compliant to 802.3-2018 supporting all media independent interfaces for (1/10/25/40/50/100/200/400/800 G)
- Provides Preemption as per IEEE 802.3-2018 CL99 specification
- Supports attachment of eMAC and pMAC with the aid of respective PLS interface
- Supports priority-based traffic split into eMAC and pMAC
- StartUp verify-respond operation is supported with user option to disable
- Retry of verify-respond operation is supported up until verify Limit
- Supports min IPG while Preemption is happening
- Capable of mCRC calculation
- Supports packet deferring in case of carrier indication signal with pass through to eMAC and pMAC
- Supports Preemptable packet reassembly when received in fragments
- Supports integrity check of fragments at MAC merge level
- Supports priority of each packet control at sequence/test level
- Supports clock data recovery(CDR).
- Supports test pattern generation and checking.
- Supports Management data Input/output registers.
- Supports full-duplex operation.
- Callback support in all Layers to provide user control.
- Rich set of configuration and parameters.
- Supports Dynamic as well as Static Error Injection scenarios.
- Built-in Coverage analysis.
- Graphical analyzer to show transactions for easy debugging
Deliverables
- Deliverables MAC Merge(Preemption) BFM's for
- MAC Merge layer
- MAC Control layer
- MAC layer
- Mac monitors and scoreboard
- Test environment and Test Suite-
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Assertions & Cover Point Tests
- User Test Suite
- Integration Guide, User Manual, and Release Note
- GUI analyzer to view simulation packet Flow