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USB 4 v2

Products >> Verification IP >> USB 4 v2

USB4 v2.0 Verification IP 

Truechip's USB4 Verification IP provides an effective & efficient way to verify the components interfacing with USB4 interface of an IP or SoC, Truechip's USB4 VIP is fully compliant with standard USB4 Specification Version 2.0 (October 2022) from USB-IF. This VIP is a lightweight with an easy plug-and-playinterface so that there is no hit on the design cycle time.

Key Benefits

  • Available in native System Verilog (UVM/OVM/VMM) and Verilog
  • Unique development methodology to ensure the highest levels of quality
  • Availability of Compliance & Regression Test Suites 
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and coverage points with connectivity examples for all the components
  • Consistency of interface, installation, operation, and documentation across all our VIPs
  • Provide complete solutions and easy integration in IP and SoC environment


  •  Fully compliant with USB4 specification v2.0 (October 2022) and Connection Manager version 2.0.
  • Supports USB3.2 Specification, Revision 1.1 and backward compatibility to USB2.0.
  • Supports USB Power Delivery Release 3.1, Version 1.8 and Type-C v2.2.
  • Supports Thunderbolt (TBT3) interoperability.
  • Compliant with PCIe Specification Revision 5.0 and PCIe Specification Revision 4.0
  • Compliant with Display Port Revisions 2.1, 2.0 and 1.4a with Alt Mode support.
  • Supports SERDES and PIPE v6.1.1 Interface for USB4, USB3, DP and PCIe.
  • Compliant with CTSs USB4CV Testsuite.
  • Support for Gen4 (80GB/s) speed including Symmetric and Asymmetric Links (max 120GB/s) in addition to Gen2 (10GB/s / 20GB/s) and Gen3 (20GB/s / 40GB/s) Speed of USB4 v1.0.
  • Supports Tunneled traffic of PCIe, USB3 (GenX and GenT) and DisplayPort using Protocol Adapters.
  • Supports Inter-Domain and TMU Block with Bidirectional, Unidirectional and Enhanced Unidirectional (v2.0) Timesync Handshake and STLP mode is also supported.
  • Supports Connectivity of Device Routers (HUB and DEVICE) for Max. 5 depths in USB4 spanning tree
  • Supports USB2 Data Transfer using USB2 Channel in parallel to USB4 channel in Type-C interface.
  • Supports Gen4 PAM2 and PAM3 Signaling with Real and Logic connectivity.
  • Supports Gen4 Encoding with Binary to Ternary conversions, RSFEC Block – RS (504,480) over GF (211)
  • Supports Gen2 and Gen3 encoding with RSFEC Block – RS (198, 194) over GF (28) and Lane Bonding support.
  • Supports Gen2/Gen3/Gen4 LFPS transmission and detection mechanism with Electrical IDLE.
  • Supports Sideband communication - AT, RT (Addressed and Broadcast), LT and ELT (v2.0) transactions.
  • Supports Gen2 / Gen3 / Gen4 (Symmetric and Asymmetric) Lane Initialization (Phase 1, Phase 2, Phase 3, Phase 4 and Phase 5) including all supported TxFFE Presets and its bypass mechanism.
  • Supports Gen2/Gen3 Scrambler/Descrambler and their bypass mechanism.
  • Supports Gen4 Scrambler/Descrambler with PRBS11, PRTS7 and PRTS19 generators.
  • Supports Gen2/Gen3/Gen4 Precoding Insertion and Removal mechanisms with bypass options.
  • Provides SSC and PPM support.
  • Supports Skew/Deskew management using De-Skew OS (Gen2, Gen3 and Gen4).
  • Supports all Gen2 and Gen3 Logical Layer ordered sets like SLOS (SLOS1 and SLOS2), TS1, TS2, CL1_REQ, CL1_ACK, TSNOS etc.
  • Supports all Gen4 Logical Layer Training Sequences – TS1, TS2, TS3 and TS4 and Ordered Sets – IGNORE, UNBOND, DESKEW (0 to 15), TSNOS, CL_OFF, CL0s_EXIT etc.
  • Supports 64/66b and 128/132b encoding/decoding for Gen2/Gen3 operations.
  • Supports Reed Solomon-Forward Error Correction (RS-FEC) Error detection and recovery mechanism.
  • Supports all Gen2/Gen3/Gen4 Lane Adapter states including all transitions.
  • Supports USB4 Port Disconnect operation and Lane Disable/Enable mechanism.
  • Support for all power management states - CL0s, CL1 and CL2 and respective objections.
  • Supports all USB4 Link Error cases and recovery mechanism with Gen4 Link Recovery Flow.
  • Supports run-time controllable disable and disconnect mechanism.
  • Supports Sleep and Wake mechanism.
  • Resets like Power-On Reset, On-the-Fly Reset etc. are supported.
  • User controlled device attach/detach function.
  • Supports Sideband register space and Configuration Space (Router CS, Adapter CS, Path CS and Counter CS).
  • Supports all Router Operations and Port Operations – Required and Optional both.
  • Supports Tunneled Link Management and Control Packets with Credit-based flow control mechanism.
  • Provides Bandwidth arbitration and prioritization of traffic in a Domain.
  • Supports Path setup and Path Tear-down mechanism.
  • Creates and manages routing tables for connected Ingress and Egress adapters.
  • Supports Time synchronization packets and handshakes in both inter-domain and intra-domain.
  • Supports Router Configuration and addressing mechanism.
  • Provides Enumerations for Host, HUB and Device and its bypass mechanism.
  • Supports Router state machine and all transitions.
  • Supports Hot-Plug and Hot-Unplug Events with Downstream Port Reset and Host Router Reset (v2.0) mechanisms.
  • Supports USB3/USB2 Data transfer using PCIe tunneling and xHCI controller in TBT3 Mode for USB3.2 HUB/USB2.0 HUB in USB4 HUB (DOCK).
  • Supports callback and configuration bit mechanism for error injection and stress test scenarios.
  • Supports all USB4 Specification timers with scaling factors to reduce simulation time and robust testing.


  •  USB4 Host/Device/HUB (including DOCK)
  • USB4 BFM/Agents for:
    • Electrical Layer
    • Logical Layer
    • Transport Layer
    • Configuration Layer
    • Protocol Adapter Layer – USB3 (Gen X and Gen T), PCIe, and DP
    • TMU Block
    • Host Interface Adapter Layer
    • Connection Manager
  • USB4 Layered Monitor and Scoreboard
  • USB4 Test Environment and Test Suites:
    • Basic and Directed Protocol Tests
    • Low Power Tests
    • Error Scenario Tests
    • Stress Tests for each standard layer
    • Random Tests
    • Compliance Test Suite (from USB-IF)
    • Assertions and Cover Points
  • Integration Guide, User Manual, Quick Start Guide, Testplan, Regression Lists, and Release Notes.
  • TrueEye GUI analyzer for simulation packet flow and usage guide.
Download the Product Brochure from here