50G Ethernet Verification IP
Truechip’s 50G Ethernet Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet interface of an IP or SoC
Truechip’s 50G Ethernet VIP is fully compliant with IEEE standard 802.3-2018 specification. This VIP is lightweight with an easy plug -and play interface so that there is no hit on the design cycle time.
Key Benefits
- Available in native System Verilog (UVM/OVM/ VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity example for all the components
- Consistency of interface, installation, operation, and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
Features
- Provides 50 Gb/s as per IEEE standard 802.3-2018 specification
- Supports standard MII interface for 50G
- Supports 50G BASE- KR, SR, FR, LR
- Supports (544, 514)Reed Solomon FEC
- Four-lane PCS for 50G BASE-R
- Supports PMD training protocol
- Supports Auto-negotiation for link speed negotiation
- Supports Energy Efficient Ethernet
- Supports clock data recovery(CDR).
- Supports Pause Frame-Based Flow Control
- Supports test pattern generation and checking
- Supports Management data Input/output registers.
- Supports full-duplex operation.
- Callback support in all Layers to provide user control.
- Rich set of configuration and parameters
- Supports Dynamic as well as Static Error Injection scenarios.
- On the fly protocol checking
- Static and Dynamic assertion.
- Built-in Coverage analysis.
- Graphical analyzer to show transactions for easy debugging
Deliverables
- MAC layer
- Reconciliation layer
- PCS layer
- Reed Solomon FEC layer
- PMA layer
- PMD layer
- AN layer
- Ethernet 25G layered monitors and scoreboard
- Test environment and Test Suite
- Basic Tests
- Error injection tests
- Assertions & Cover Point Tests
- User Test Suite
- Integration Guide, User Manual, and Release Note
- GUI analyzer to view simulation packet Flow