Articles

DDR Verification IP stands for double data rate. It is a memory technology based on Synchronous dynamic random access memory (SDRAM). DDR SDRAM access is twice as fast as SDRAM, because DDR data transfers occurs on both edges of the clock signal as c...

The function of negotiating between the capability advertised by the physical layer of the OSI reference model is known as Auto Negotiation. This mechanism helps to control the connection of a single MDI(Media Dependent Interface) to a single PHY typ...

The Non Volatile Memory Express standard is stimulating a new era of highly efficient and powerful mass storage devices. But for all its strengths, it also sets new challenges for verification. This blog aims at addressing the challenges in verifyi...

1. Agenda Introduction Block Diagram Modes of asynchronous sequential circuit Design Flow Example Explanation Applications Advantages Disadvantages 2. Introduction Asynchronous sequential circuit works without Clock. ...

As we know JESD204 standard describes a serial data interface between convertors and logic devices. In Revision A, the main expansion was to support both single and multiple lanes per convertor device. In Revision B,  mainly added features were ...