Support for 64.0 GT/s Data Rate per lane with backwards compatible
Support for new PAM4 Signaling and Gray Coding
Support for both Flit Mode & Non-Flit Mode
Support for TS0 ordered set (Equalization at 64bit)

Truechip CXL VIP provides support for binding and management of pooled ports and devices i.e. FM functionality in memory pooling
Support for Persistent memory with GPF in a CXL sub-system
Support for Latency Optimized flit

USB 4 v2.0 Verification IP

Fully compliant with USB4 specification v2.0 (October 2022) and Connection Manager version 2.0
Supports USB3.2 Specification, Revision 1.1, and backward compatibility to USB2.0
Supports USB Power Delivery Release 3.1, Version 1.8, and Type-C v2.2

NoC Silicon IP

Support for different protocol for master and slave port interface.
Support physical address conversion through NOC.
Support different phase shifteded frequencies for each Master and Slaves.
Port priority, Programmable register, Keeper count.

NoC Verification IP

Multi protocol NOC ports - Each interface can support different protocol.
Segmented slave memories also supported.
Generates different test scenarios and coverage models.
User can select which sequence to be run on which environment.

24 x 7 Support Model

Truechip Provides 24 x 7 Support to its Customers
Customer Satisfaction
On Time Delivery
Bug/Enhancement Request

Verification IPs & Silicon IPs

Truechip Verification IPs are designed with full debug, full functional coverage and full protocol checkers. Based on SystemVerilog and UVM, it will integrate smoothly into standard SystemVerilog/UVM flows.

Automation & GUI

Silicon IPs

Verification IPs

Design Services

DFT Services

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Company Overview

We are leading provider of Design and Verification solutions

Truechip, the Verification IP specialist, is a leading provider of Design and Verification solutions – which help you, accelerate your design, lowering the cost and the risks associated with the development of your ASIC, FPGA and SOC. Truechip is a privately held company, with a global footprint and sales coverage across North America, Europe and Asia.

Truechip has been serving customers since last 10 years in VLSI with a strong and experienced leadership. Truechip provides industry’s first 24x5 support model with specialization in VIP integration, customization and SOC Verification.

Get in Touch with us to learn about our Services.

Truechip has been serving customers since last 6+ yrs in VLSI with a strong and experienced leadership.
Truechip is Industry’s first 24x5 support model mization and SOC Verification.

Latest Blogs

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Testimonials

Truechip possesses a wide variety of Verification IPs (VIPs) that are easy to integrate, highly customizable, and designed by leveraging comprehensive verification methodologies to cover the scenarios for High Speed Serial Protocols such as PCIe Gen4. Truechip PCIe Gen4 Verification IP is a prudent choice since the VIP is modular, offers a comprehensive test suite, coupled with rugged protocol checker and easy to understand logs.

Ritesh Saraf, CEO, OmniPhy

Truechip has a wide variety of specialized verification IPs (VIPs) that are architected and designed by leveraging comprehensive test-bench and assertion based verification methodologies to cover the scenarios for High Speed Serial Protocols. Truechip compliance suite for these protocols is quite comprehensive and user friendly.

Dr. Sankar Reddy, Terminus Circuits

We evaluated several suppliers and found Truechip USB3.1 CVIP to be the ideal solution according to our criteria of ease of integration, good error reporting and strong protocol checkers. Also the customer support that we got has been the best in class.

Gopalkrishna Nayak, VP Engineering at Silabtech Pvt. Ltd.

We evaluated several suppliers but found Truechip PCIe CVIP to be robust, easy to integrate and equipped with the strong protocol checkers we need to meet our quality objectives. When we considered the additional factors of license model flexibility and support it was a fairly easy decision.

Joe Goode, CEO, Logicircuit.Inc

Ok this is helpful - the phrase " the upstream must continue asserting warm reset" made me think we needed to be doing something.

USB 3.0 VIP, Happy Customer

Thanks for your detailed comments. We have reviewed the spec and our design and agree we have a problem. The design has been updated to drive HBURST=0x0 during single transfers. We are now passing with the new checker.

AMBA AHB2 VIP, Happy Customer

I discussed the errors with the design team and they have agreed to update the design.

DDR3 VIP, Happy Customer

Having a large number of Truechip licenses has been great in really flushing out the gremlins in the Testbench. The test failure below has been fixed and both simulators run clean with that test.

AMBA APB4 VIP, Happy Customer

Assertions helped us find 2 corner bugs and have really helped us gain confidence in our coverage and verification plan.

MIPI CSI2 VIP, Happy Customer